Field of the Invention
The present invention relates to a sensor device which converts a physical quantity applied from outside into a binary voltage signal level, and an inspection method thereof, and relates to a sensor device capable of executing a high temperature inspection using self-heat generation without adding a test pad large in occupation area, and an inspection method thereof.
Background Art
In order to confirm that after manufacturing a semiconductor device, the function and property thereof satisfy product standards, the semiconductor device is inspected in a wafer state or a package state. It is desirable to perform even an inspection not only at normal temperature but also in a high temperature state in which a variation in property and a malfunction are commonly easy to occur. However, in order to raise an ambient temperature and thereby perform such a high temperature inspection, the introduction of a device and an additional inspection time are required, thus leading to an increase in cost.
In order to solve such a problem, attempts to raise a junction temperature of a chip at an ordinary temperature and thereby execute a high temperature inspection have heretofore been made.
FIG. 11 is a block diagram of a semiconductor device capable of high-temperature inspection by related art self-heat generation. The related art semiconductor device 1 has a power supply terminal 2, a ground terminal 3, an output terminal 4, a test terminal 100, and a resistive element 101 for heating connected to the test terminal 100. A voltage or current is supplied from the test terminal 100 to cause the resistive element 101 to generate heat, thereby enabling a high temperature inspection under the operation of the semiconductor device in a state in which the junction temperature of the chip is raised.
Further, FIG. 12 is a semiconductor device capable of high-temperature inspection by self-heat generation, which has been disclosed in Patent Document 1. The semiconductor device 1 has a power supply terminal 2, a ground terminal 3, an output terminal 4, a terminal 102 unused for measurement at the time of inspection, and parasitic PN junctions 103 and 104 such as ESD protection elements connected to the terminal 102. In this configuration, a forward current is supplied from the terminal 102 to the parasitic PN junction 103 or the parasitic PN junction 104 to thereby cause the parasitic PN junction to generate heat, whereby it is possible to perform a high temperature inspection under the operation of the semiconductor device in a state in which a junction temperature of a chip is raised.
Thus, the dedicated terminal, or the existing terminal unused for measurement at the time of inspection is used to cause the internal element to raise the junction temperature by the self-heat generation, whereby the high temperature inspection is carried out. Further, even in the case where an upper limit of an ambient temperature capable of being generated under a high temperature inspection environment is less than a desired temperature, an inspection at the desired temperature is made possible by setting the junction temperature higher than the ambient temperature, using the self-heat generation.
[Patent Document 1] Japanese Patent Application Laid-Open No. Hei 10 (1998)-135286